Espressif Systems /ESP32-P4 /H264_DMA /IN_CONF0_CH3

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Interpret as IN_CONF0_CH3

Description

RX CH3 config0 register

Fields

INDSCR_BURST_EN_CH3	Set this bit to 1 to enable INCR burst transfer for Rx transmitting link descriptor when accessing SRAM.
IN_ECC_AES_EN_CH3	When access address space is ecc/aes area, this bit should be set to 1. In this case, the start address of square should be 16-bit aligned. The width of square multiply byte number of one pixel should be 16-bit aligned.
IN_CHECK_OWNER_CH3	Set this bit to enable checking the owner attribute of the link descriptor.
IN_MEM_BURST_LENGTH_CH3	Block size of Rx channel 1. 0: single 1: 16 bytes 2: 32 bytes 3: 64 bytes 4: 128 bytes
IN_PAGE_BOUND_EN_CH3	Set this bit to 1 to make sure AXI write data don’t cross the address boundary which define by mem_burst_length
IN_RST_CH3	Write 1 then write 0 to this bit to reset Rx channel
IN_CMD_DISABLE_CH3	Write 1 before reset and write 0 after reset
IN_ARB_WEIGHT_OPT_DIS_CH3	Set this bit to 1 to disable arbiter optimum weight function.

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